Version 1.7
Lecture: Unconventional HDL synthesis experiments
Will it synthesize?
Most synthesis goes from hardware description languages to FPGA bitstreams or ASIC designs, but what else can you do? In this talk I will demonstrate some more unconventional flows to inspire you about all the amazing experiments that are enabled by open source tools!
After a short intro about the open source FPGA ecosystem, I will introduce a project by Dan Ravensloft and myself that synthesizes HDL to 74xx logic chips. Then I will cover a project of mine that synthesizes spreadsheets to HDL. And from there to 74xx logic???
Info
Day:
2020-12-29
Start time:
18:00
Duration:
00:40
Room:
rC2
Track:
Hardware & Making
Language:
en
Links:
Feedback
Click here to let us know how you liked this event.
Concurrent Events
Speakers
Pepijn de Vos |