Version 1.5b Castle in the Sky
lecture: A Free and Open Source Verilog-to-Bitstream Flow for iCE40 FPGAs
Yosys (Yosys Open Synthesis Suite) is an Open Source Verilog synthesis and verification tool.
Project IceStorm aims at reverse engineering and documenting the bit-stream format of Lattice iCE40 FPGAs and providing simple tools for analyzing and creating bit-stream files, including a tool that converts iCE40 bit-stream files into behavioral Verilog. Currently the bitstream format for iCE40 HX1K and HX8K is fully documented and supported by the tools.
Arachne-PNR is an Open Source place&route tool for iCE40 FPGAs based on the databases provided by Project IceStorm. It converts BLIF files into an ASCII file format that can be turned into a bit-stream by IceStorm tools.
This three projects together implement a complete open source tool-chain for iCE40 FPGAs. It is available now and it is feature complete (with the exception of timing analysis, which is work in progress).
Info
Day:
2015-12-27
Start time:
16:00
Duration:
01:00
Room:
Hall 1
Track:
Hardware & Making
Language:
en
Links:
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Concurrent Events
- Hall 2
- Hardware-Trojaner in Security-Chips
- Hall 6
- Lifting the Fog on Red Star OS
- Hall G
- Netzpolitik in der Schweiz
Speakers
 |
Clifford |